A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems
暂无分享,去创建一个
[1] Chi-Ying Tsui,et al. Saving power in the control path of embedded processors , 1994, IEEE Design & Test of Computers.
[2] Luca Benini,et al. Power optimization of core-based systems by address bus encoding , 1998, IEEE Trans. Very Large Scale Integr. Syst..
[3] Luca Benini,et al. Address bus encoding techniques for system-level power optimization , 1998, Proceedings Design, Automation and Test in Europe.
[4] Mircea R. Stan,et al. Bus-invert coding for low-power I/O , 1995, IEEE Trans. Very Large Scale Integr. Syst..
[5] Neil Weste,et al. Principles of CMOS VLSI Design , 1985 .
[6] Luca Benini,et al. Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems , 1997, Proceedings Great Lakes Symposium on VLSI.
[7] Elizabeth M. Rudnick,et al. Genetic algorithms for VLSI design, layout & test automation , 1999 .