论文信息 - A low power CMOS interface circuit for three-axis integrated accelerometers

A low power CMOS interface circuit for three-axis integrated accelerometers

A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.

P. Bruschi | T. Ungaretti | M. Schipani | G.C. Tripoli

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