Reconfigurable Backplane Topology

In the field of embedded computer and communication systems, the demands for the interconnection networks are increasing rapidly. To satisfy these demands much advancement has been made at the chip level as well as at the system level and still the research works are going on, to make the interconnection networks more flexible to satisfy the demands of the real-time applications. This thesis mainly focuses on the interconnection between the nodes in an embedded system via a reconfigurable backplane. To satisfy the project goals, an algorithm is written for the reconfigurable topology that changes according to the given traffic specification like throughput. Initially the connections are established between pairs of nodes according to the given throughput demands. By establishing all the connections, a topology is formed. Then a possible path is chosen for traversing the data from source to destination nodes. Later the algorithm is implemented by simulation and the results are shown in a tabular form. Through some application examples, we both identify problems with the algorithm and propose an improvement to deal with such problems.