Interleaved sepic converter with low switching loss

An interleaved sepic converter with low turn-on switching loss is presented in this paper. Power switches can be turned on with zero-voltage-switching (ZVS) feature when it is operated at duty cycle greater than 0.5. Although, the proposed converter is operated at hard switching when the duty cycle is less than 0.5, the smooth current by the resonant inductance can reduce the turn-on switching loss. Thus the total switching losses can be reduced compared to the hard switching converter. The interleaved PWM scheme can also reduce the current ripple at the input and output capacitors. Thus the size of inductor and capacitor can be reduced. The circuit configuration, operational principles and design considerations of the proposed converter are discussed in detail. Finally, simulations and experiments from a 120W laboratory prototype are provided to confirm the theoretical analysis and the advantages of the proposed converter.

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