CMOS design of a boost-buck regulator with high efficiency for a wireless sensor network deployed for large aircraft in-flight tests

In this paper, a new design is proposed of a buck boost regulator with high efficiency for a wireless sensor network (WSN) deployed for large aircraft in-flight tests. Focusing on, the associated management strategies for a WSN deployed for large aircraft in-flight tests and aeronautical application. Generally, if a pulse-width modulator (PWM) maximum and minimum duty cycle limitations can result in pulse skipping at the mode transition and substantial increases in the output voltage ripple. So, a significant PWM discontinuity near mode transition due to PWM comparator overdrive nonlinearity, which limits the maximum duty cycle. The circuit has been implemented in a 90nm CMOS technology, capable of generating voltages in a range of 3.1 V with a minimum drop out voltage of 200mv, and to regulated output with Input voltage above, below or equal to the output voltage. the maximum load current is 3A, with high efficiency show increments of global efficiency up to 94%, the overall circuit consumes less than half a mW, The buck-boost regulator occupies an area of 105µm2.

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