Image Computer Architecture for region dependent and parallel algorithms

Many applications in visual inspection and in robotvision require a very fast interpretation and evaluation of images, so that industrial processes should not be slowed down. In this paper an image computer architecture is proposed, which is optimalized for two classes of typical image processing tasks, required in visual inspection and robotvision.* Time-filtering, motion analysis, stereo-vision, image compression, matching are examples of a first class of image processing tasks. They have in common that they require paral-lel processing of different images, so they need parallel accesses to them as source, reference or parameter matrix. To a second class of image processing tasks belongs feature extraction; in contrast with the preceding, this processing requires only one image. These algorithms often don't scan through the image in a predetermined way. They are often driven by the image data itself, where pixel data are fed back to compute the next addresses (e.g. connectivity analysis). Fast random access to the image memories and an efficient data-to-address feedback are needed then. The basic element of the system is a fast Image Bus (IBUS) which is a reflection of the needs of parallel access and random access processing : four differently programmable data channels, two address busses and data-to-address feedback capabilities. The system itself is modular to allow minimum configurations in a wide variety of industrial visual inspection tasks.