Large area compression molding for Fan-out Panel Level Packing

Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics. Mold embedding for this technology is currently done on wafer level up to 12"/300 mm diameter. For higher productivity and therewith lower costs larger mold embedding form factors are forecasted for the near future. Following the wafer level approach then the next step will be a reconfigured wafer size of 450 mm. An alternative option would be leaving the wafer shape and moving to panel sizes leading to Fan-out Panel Level Packaging (FOPLP). Sizes for the panel could range up to 24"×18" or even larger. For reconfigured mold embedding, compression mold processes are used in combination with liquid, granular or sheet compound. As a process alternative also lamination as used e.g. in PCB manufacturing can be taken into account.=Within this paper the evaluation of panel level compression molding with a target form factor of 24”*18” / 610×457 mm2 is described. The large panel size equals a typical PCB manufacturing full format and is selected to achieve process compatibility with cost efficient PCB processes. Here not only conventional compression molding is considered but also the new process compression mold lamination is introduced as a tool-less mold alternative. Panel level molding is compared to 8” and 12” wafer molding as well as to low cost PCB 24”×18” lamination focusing on manufacturing challenges, high volume capability and estimated cost. Technological focus of this study will be the evaluation of liquid, granular and sheet molding compound. This includes thorough material analysis regarding the process relevant material properties as reactivity or viscosity. One key process step for homogeneous large area embedding is material application before compression molding. Where sheet compounds already deliver a uniform material layer the application of liquid and granular compound must be optimized and adapted for a homogeneous distribution without flow marks, knit lines and incomplete fills. Hence, dispense patterns of liquid and granular molding compounds are studied to achieve high yield and reliable mold embedding. In addition applicable thickness ranges, total thickness variations, void risks and warpage will be investigated for the different material types. The overall a process flow will be demonstrated for selected compression mold variants resulting in a 24”×18” / 610×457 mm2 FOPLP using PCB based redistribution layer (RDL) as low cost alternative to thin film technology. For=PCB based RDLs a resin coated copper sheet (RCC) is laminated on the reconfigured wafer or panel, respectively. Micro vias are drilled through the RCC layer to the die pads and electrically connected by Cu plating. Final process step is the etching of Cu lines using laser direct imaging (LDI) techniques for maskless patterning. All process steps are carried out on full format 24”×18” / 610×457 mm2.

[1]  J. Bauer,et al.  Through mold vias for stacking of mold embedded packages , 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

[2]  B. Keser,et al.  The Redistributed Chip Package: A Breakthrough for Advanced Packaging , 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

[3]  J. Bauer,et al.  From wafer level to panel level mold embedding , 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

[4]  H Reichl,et al.  Large area embedding for heterogeneous system integration , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[5]  Yonggang Jin,et al.  Next generation eWLB (embedded wafer level BGA) packaging , 2010, 2010 12th Electronics Packaging Technology Conference.

[6]  M. Brunnbauer,et al.  Embedded Wafer Level Ball Grid Array (eWLB) , 2008, 2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT).

[7]  R. Aschenbrenner,et al.  Through mold via technology for multi-sensor stacking , 2012, 2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).