Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique

In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M2 & M3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.

[1]  Mourad N. El-Gamal,et al.  Very low-voltage (0.8V) CMOS receiver frontend for 5 GHz RF applications , 2002 .

[2]  Yongwang Ding,et al.  A +18dBm IIP3 LNA in 0.35μm CMOS , 2001 .

[3]  Hwann-Kaeo Chiou,et al.  Feed-Forward Correction Technique for a High Linearity WiMAX Differential Low Noise Amplifier , 2007, 2007 IEEE International Workshop on Radio-Frequency Integration Technology.

[4]  Bumman Kim,et al.  A modified cascode type low noise amplifier using dual common source transistors , 2002, 2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278).

[5]  H. Samavati,et al.  5-GHz CMOS wireless LANs , 2002 .

[6]  Heng Zhang,et al.  A Low-Power, Linearized, Ultra-Wideband LNA Design Technique , 2009, IEEE Journal of Solid-State Circuits.

[7]  Qamar Ul Wahab,et al.  Figure of merit for narrowband, wideband and multiband LNAs , 2012 .

[8]  Yann Deval,et al.  Design of a 0.9 V 2.45 GHz Self-Testable and Reliability-Enhanced CMOS LNA , 2008, IEEE Journal of Solid-State Circuits.

[9]  Tri T. Ha,et al.  Solid-State Microwave Amplifier Design , 1981 .

[10]  Z.M. Lin,et al.  A Low Noise Gain-Variable LNA for 802.11a WLAN , 2007, 2007 IEEE Conference on Electron Devices and Solid-State Circuits.

[11]  Osama Shanaa,et al.  Frequency-scalable SiGe bipolar RF front-end design , 2001 .

[12]  K. H. Lee,et al.  Very low-voltage (0.8 v) CMOS receiver frontend for 5 GHz RF applications : RF circuits and systems for wireless communications , 2002 .

[13]  B. Jackson,et al.  A CMOS Amplifier with Third-Order Intermodulation Distortion Cancellation , 2009, 2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

[14]  T. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996 .

[15]  José Manuel de la Rosa,et al.  Adaptive CMOS LNAs for beyond-3G RF receivers - A multi-standard GSM/WCDMA/BT/WLAN case study , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[16]  Hongyi Chen,et al.  A Novel IP3 Boosting Technique Using Feedforward Distortion Cancellation Method for 5 GHz CMOS LNA , 2003, IEEE MTT-S International Microwave Symposium Digest, 2003.

[17]  Z. Li.  Packaged single-ended CMOS low noise amplifier with 2.3 dB noise figure and 64 dBm IIP2 , 2004 .

[18]  Chung-Yu Wu,et al.  A 5-GHz CMOS double-quadrature receiver front-end with single-stage quadrature generator , 2004 .

[19]  Kiat Seng Yeo,et al.  A 1 V switchable CMOS LNA for 802.11A/B WLAN applications , 2006 .