Ant Colony System for the Design of Combinational Logic Circuits

In this paper we propose an application of the Ant System (AS) to optimize combinational logic circuits at the gate level. We define a measure of quality improvement in partially built circuits to compute the distances required by the AS and we consider as optimal those solutions that represent functional circuits with a minimum amount of gates. The proposed methodology is described together with some examples taken from the literature that illustrate the feasibility of the approach.