Characterization of the n-XYTER chip and preparations for the engineering run

The n-XYTER ASIC, developed and prototyped by the EU-FP6 NMI3 DETNI collaboration in 2006, has undergone extensive testing and evaluation during the past years at GSI. This 128 channel ASIC [1] realizes a self triggering front-end readout architecture that will as such uniquely serve the CBM collaboration to prototype a purely data driven detector readout chain. CBM intends to employ this readout chain early on in detector prototyping and system development and study the implications of such change in readout paradigm.