A blueprint for system-level performance modeling of software-intensive embedded systems

Exploration of design alternatives and estimation of their key performance metrics such as latency and energy consumption is essential for making the proper design decisions in the early phases of system development. Often, high-level models of the dynamic behavior of the system are used for the analysis of design alternatives. Our work presents a blueprint for building efficient and re-usable models for this purpose. It builds on the well-known Y-chart pattern in that it gives more structure for the proper modeling of interaction on shared resources that plays a prominent role in software-intensive embedded systems. We show how the blueprint can be used to model a small yet illustrative example system with the Uppaal tool, and with the Java general-purpose programming language, and reflect on their respective strengths and weaknesses. The Java-based approach has resulted in a very flexible and fast discrete-event simulator with many re-usable components. It currently is used by TNO-ESI and Océ-Technologies B.V. for early model-based performance analysis that supports the design process for professional printing systems.

[1]  Jan Madsen,et al.  Abstract RTOS modeling for multiprocessor system-on-chip , 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

[2]  James Lapalme Nouvelles approches pour la conception d'outils cao pour le domaine des systemes embarques , 2009 .

[3]  Steffen Becker,et al.  Automatically improve software architecture models for performance, reliability, and cost using evolutionary algorithms , 2010, WOSP/SIPEW '10.

[4]  Andreas Gerstlauer,et al.  RTOS modeling for system level design , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[5]  David Holmes,et al.  Java Concurrency in Practice , 2006 .

[6]  M. Diaz,et al.  Modeling and Verification of Time Dependent Systems Using Time Petri Nets , 1991, IEEE Trans. Software Eng..

[7]  Marco Laumanns,et al.  SPEA2: Improving the Strength Pareto Evolutionary Algorithm For Multiobjective Optimization , 2002 .

[8]  Jpm Jeroen Voeten,et al.  Specification of reactive hardware/software systems : the method software/hardware engineering (SHE) , 1997 .

[9]  Jean Paul Calvez,et al.  A generic RTOS model for real-time systems simulation with systemC , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[10]  Kim G. Larsen,et al.  Statistical Model Checking for Networks of Priced Timed Automata , 2011, FORMATS.

[11]  Pieter J. Mosterman Model-Based Design of Embedded Systems , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

[12]  Kim G. Larsen,et al.  A Tutorial on Uppaal , 2004, SFM.

[13]  Andrew S. Cassidy,et al.  Layered, multi-threaded, high-level performance design , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[14]  Andrew S. Cassidy,et al.  High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors , 2005, TODE.

[15]  Lars Michael Kristensen,et al.  Coloured Petri Nets and CPN Tools for modelling and validation of concurrent systems , 2007, International Journal on Software Tools for Technology Transfer.

[16]  Steffen Becker,et al.  Model-Based performance prediction with the palladio component model , 2007, WOSP '07.

[17]  Wang Yi,et al.  UPPAAL Implementation Secrets , 2002, FTRTFT.

[18]  Twan Basten,et al.  Model-Driven Design-Space Exploration for Embedded Systems: The Octopus Toolset , 2010, ISoLA.

[19]  Kim G. Larsen,et al.  The Impressive Power of Stopwatches , 2000, CONCUR.

[20]  Andy D. Pimentel,et al.  A systematic approach to exploring embedded system architectures at multiple abstraction levels , 2006, IEEE Transactions on Computers.

[21]  Giovanni Beltrame,et al.  A comparative evaluation of multi-objective exploration algorithms for high-level design , 2014, TODE.

[22]  Rajeev Alur,et al.  A Theory of Timed Automata , 1994, Theor. Comput. Sci..

[23]  Bd Bart Theelen,et al.  Performance Modelling for System-Level Design. Tutorial. , 2005 .

[24]  Georgeta Igna,et al.  Performance analysis of real-time task systems using timed automata , 2013 .

[25]  Connie U. Smith,et al.  Introduction to Software Performance Engineering: Origins and Outstanding Problems , 2007, SFM.

[26]  Twan Basten,et al.  Pareto Analysis with Uncertainty , 2011, 2011 IFIP 9th International Conference on Embedded and Ubiquitous Computing.

[27]  Vincenzo Grassi,et al.  From design to analysis models: a kernel language for performance and reliability analysis of component-based systems , 2005, WOSP '05.

[28]  Wang Yi,et al.  UPPAAL 4.0 , 2006, Third International Conference on the Quantitative Evaluation of Systems - (QEST'06).

[29]  Kim G. Larsen,et al.  Schedulability of Herschel-Planck Revisited Using Statistical Model Checking , 2012, ISoLA.

[30]  Jan Madsen,et al.  ARTS: A SystemC-based framework for multiprocessor Systems-on-Chip modelling , 2007, Des. Autom. Embed. Syst..

[31]  Michael R. Hansen,et al.  MoVES — A framework for modelling and verifying embedded systems , 2009, 2009 International Conference on Microelectronics - ICM.

[32]  Marc Voorhoeve,et al.  Parameterized timed partial orders with resources: formal definition and semantics , 2010 .

[33]  Frits W. Vaandrager,et al.  Reconstructing Critical Paths from Execution Traces , 2012, 2012 IEEE 15th International Conference on Computational Science and Engineering.

[34]  Kim Guldstrand Larsen,et al.  Model-Based Framework for Schedulability Analysis Using Uppaal 4.1 , 2018, Model-Based Design for Embedded Systems.

[35]  Ed F. Deprettere,et al.  An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures , 1997, ASAP.

[36]  B. Wüthrich AN INTERNATIONAL SYMPOSIUM , 1997 .

[37]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[38]  Twan Basten,et al.  Integrated model-driven design-space exploration for embedded systems , 2011, 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

[39]  Ralph Johnson,et al.  design patterns elements of reusable object oriented software , 2019 .

[40]  Luciano Lavagno,et al.  Hardware-software co-design of embedded systems: the POLIS approach , 1997 .

[41]  Thomas A. Henzinger,et al.  The Algorithmic Analysis of Hybrid Systems , 1995, Theor. Comput. Sci..

[42]  Michael R. Hansen,et al.  Models and formal verification of multiprocessor system-on-chips , 2008, J. Log. Algebraic Methods Program..

[43]  Henk Corporaal,et al.  Model-Driven Design-Space Exploration for Software-Intensive Embedded Systems , 2012 .

[44]  Lothar Thiele,et al.  Y-chart based system design: a discussion on approaches , 2009 .

[45]  Andreas Gerstlauer,et al.  Abstract system-level models for early performance and power exploration , 2012, 17th Asia and South Pacific Design Automation Conference.

[46]  Donald E. Thomas,et al.  Schedulers as model-based design elements in programmable heterogeneous multiprocessors , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[47]  Capers Jones,et al.  Embedded Software: Facts, Figures, and Future , 2009, Computer.