Information relationships and measures: an analysis apparatus for efficient information system synthesis

The analysis of information relationships is of primary importance for the analysis and synthesis of digital information systems. The paper aims to introduce and discuss the fundamental apparatus for the analysis and evaluation of information relationships. It defines and explains various relationships between information, measures for the amount and importance of information, and measures for the strength and importance of the information relationships. It demonstrates importance of the introduced relationships and measures for efficient synthesis, and shows how to apply them in the synthesis process. The analysis apparatus makes operational the famous theory of partitions and set systems of Hartmanis (1966). While partitions and set systems enable one to model information, the relationships and measures enable one to analyze and measure information and information relationships. Both together form a complete information modeling and analysis apparatus that can be applied in logic design, decision system design, pattern recognition, knowledge discovery, machine learning and other areas.

[1]  Seiyang Yang,et al.  PLADE: a two-stage PLA decomposition , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Wei Wan,et al.  A new approach to the decomposition of incompletely specified multi-output functions based on graph coloring and local transformations and its application to FPGA mapping , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[3]  Lech Jóźwiak,et al.  An efficient for the sequential general decomposition of sequential machines , 1991, Microprocessing and Microprogramming.

[4]  Lech Jóźwiak,et al.  Simultaneous decompositions of sequential machines , 1990, Microprocessing and Microprogramming.

[5]  Tadeusz Luba Multi-level logic synthesis based on decomposition , 1994, Microprocess. Microsystems.

[6]  F. Wolf,et al.  Efficient decomposition of assigned sequential machines and Boolean functions for PLD implementations , 1995, Proceedings Electronic Technology Directions to the Year 2000.

[7]  Lech Jóźwiak,et al.  General Decomposition and Its Use in Digital Circuit Synthesis , 1995 .

[8]  Tadeusz Luba,et al.  Rough Sets and Some Aspects of Logic Synthesis , 1992, Intelligent Decision Support.

[9]  Mpj Mario Stevens,et al.  Division-Based Versus General Decomposition-Based Multiple-Level Logic Synthesis , 1995 .

[10]  Tadeusz Luba,et al.  ROM-based finite state machines with PLA address modifiers , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[11]  L. Jozwiak,et al.  An efficient method for decomposition of multiple-output Boolean functions and assigned sequential machines , 1992, [1992] Proceedings The European Conference on Design Automation.

[12]  Lech Jozwiak,et al.  Input support minimization for efficient PLD and FPGA synthesis , 1996 .

[13]  Tadeusz Łuba,et al.  Multi-level logic synthesis based on decomposition , 1994 .

[14]  J. Hartmanis,et al.  Algebraic Structure Theory Of Sequential Machines , 1966 .

[15]  Alberto L. Sangiovanni-Vincentelli,et al.  Boolean decomposition in multi-level logic optimization , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[16]  Srinivas Devadas,et al.  General Decomposition of Sequential Machines: Relationships to State Assignment , 1989, 26th ACM/IEEE Design Automation Conference.

[17]  Marek Perkowski,et al.  A new approach to the decomposition of incompletely specified multi-output functions based on graph coloring and local transformations and its application to FPGA mapping , 1992 .

[18]  Jerzy Kalinowski,et al.  Parallel Decomposition in Logic Synthesis , 1989, ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference.

[19]  Robert K. Brayton,et al.  Performance directed synthesis for table look up programmable gate arrays , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[20]  Alberto Sangiovanni-Vincentelli,et al.  Boolean decomposition in multilevel logic optimization , 1989 .