Multicore-Aware Code Co-Positioning to Reduce WCET on Dual-Core Processors with Shared Instruction Caches
暂无分享,去创建一个
[1] Wei Zhang,et al. WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches , 2008, 2008 IEEE Real-Time and Embedded Technology and Applications Symposium.
[2] Frank Mueller,et al. Compiler support for software-based cache partitioning , 1995, Workshop on Languages, Compilers, & Tools for Real-Time Systems.
[3] Qian Zhang,et al. CardioSentinal: A 24-hour Heart Care and Monitoring System , 2012, J. Comput. Sci. Eng..
[4] B. R. Rau,et al. HPL-PD Architecture Specification:Version 1.1 , 2000 .
[5] Jay K. Strosnider,et al. SMART (strategic memory allocation for real-time) cache design using the MIPS R3000 , 1990, [1990] Proceedings 11th Real-Time Systems Symposium.
[6] Microsystems Sun,et al. Jini^ Architecture Specification Version 2.0 , 2003 .
[7] David R. Karger,et al. Near-optimal intraprocedural branch alignment , 1997, PLDI '97.
[8] Andrew Wolfe,et al. Software-based cache partitioning for real-time applications , 1994 .
[9] Dirk Grunwald,et al. Reducing branch costs via branch alignment , 1994, ASPLOS VI.
[10] Scott McFarling,et al. Program optimization for instruction caches , 1989, ASPLOS III.
[11] Wei Zhang,et al. Multicore-Aware Code Positioning to Improve Worst-Case Performance , 2011, 2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing.
[12] Chanik Park,et al. Real-time scheduling in heterogeneous dual-core architectures , 2006, 12th International Conference on Parallel and Distributed Systems - (ICPADS'06).
[13] David B. Whalley,et al. ParaScale: exploiting parametric timing analysis for real-time schedulers and dynamic voltage scaling , 2005, 26th IEEE International Real-Time Systems Symposium (RTSS'05).
[14] James H. Anderson,et al. A Hybrid Real-Time Scheduling Approach for Large-Scale Multicore Platforms , 2007, 19th Euromicro Conference on Real-Time Systems (ECRTS'07).
[15] W. W. Hwu,et al. Achieving high instruction cache performance with an optimizing compiler , 1989, ISCA '89.
[16] Sharad Malik,et al. Performance Analysis of Embedded Software Using Implicit Path Enumeration , 1995, 32nd Design Automation Conference.
[17] Karl Pettis,et al. Profile guided code positioning , 1990, PLDI '90.
[18] D. B. Kirk,et al. SMART (strategic memory allocation for real-time) cache design , 1989, [1989] Proceedings. Real-Time Systems Symposium.
[19] David B. Whalley,et al. WCET code positioning , 2004, 25th IEEE International Real-Time Systems Symposium.
[20] Paul Lokuciejewski,et al. WCET-driven Cache-based Procedure Positioning Optimizations , 2008, 2008 Euromicro Conference on Real-Time Systems.
[21] Sharad Malik,et al. Cache modeling for real-time software: beyond direct mapped instruction caches , 1996, 17th IEEE Real-Time Systems Symposium.