Power Efficient and High-Accuracy Approximate Multiplier with Error Correction

Approximate arithmetic circuits have been considered as an innovative circuit paradigm with improved performance for error-resilient applications which could tolerant certain loss of accuracy. In t...

[1]  Yuehua Li,et al.  Practical Reliability Analysis and Approximate Design of Arithmetic Circuits , 2019, J. Circuits Syst. Comput..

[2]  Saibal Mukhopadhyay,et al.  A Power-Aware Digital Multilayer Perceptron Accelerator with On-Chip Training Based on Approximate Computing , 2017, IEEE Transactions on Emerging Topics in Computing.

[3]  Fabrizio Lombardi,et al.  Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition , 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4]  Fabrizio Lombardi,et al.  Design and Analysis of Approximate Compressors for Multiplication , 2015, IEEE Transactions on Computers.

[5]  Binod Kumar,et al.  Power-Delay-Error-Efficient Approximate Adder for Error-Resilient Applications , 2019, J. Circuits Syst. Comput..

[6]  Dimitrios Soudris,et al.  Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[7]  Reza Faghih Mirzaee,et al.  A Novel High-Speed, Low-Power CNTFET-Based Inexact Full Adder Cell for Image Processing Application of Motion Detector , 2017, J. Circuits Syst. Comput..

[8]  Kun Cao,et al.  Affinity-Driven Modeling and Scheduling for Makespan Optimization in Heterogeneous Multiprocessor Systems , 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Fei Qiao,et al.  Multistage Latency Adders Architecture Employing Approximate Computing , 2017, J. Circuits Syst. Comput..

[10]  Shih-Lien Lu.  Speeding Up Processing with Approximation Circuits , 2004, Computer.

[11]  Román Hermida,et al.  Multispeculative Addition Applied to Datapath Synthesis , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  Zhi-Hui Kong,et al.  Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Junlong Zhou,et al.  Lifetime-aware real-time task scheduling on fault-tolerant mixed-criticality embedded systems , 2019, Future Gener. Comput. Syst..

[14]  Eero P. Simoncelli,et al.  Image quality assessment: from error visibility to structural similarity , 2004, IEEE Transactions on Image Processing.

[15]  Sunggu Lee,et al.  Multipliers With Approximate 4–2 Compressors and Error Recovery Modules , 2018, IEEE Embedded Systems Letters.

[16]  Christopher S. Wallace,et al.  A Suggestion for a Fast Multiplier , 1964, IEEE Trans. Electron. Comput..

[17]  Taejoon Park,et al.  Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[18]  Fabrizio Lombardi,et al.  New Metrics for the Reliability of Approximate and Probabilistic Adders , 2013, IEEE Transactions on Computers.

[19]  Andrew B. Kahng,et al.  Accuracy-configurable adder for approximate arithmetic designs , 2012, DAC Design Automation Conference 2012.