A highly testable 1-out-of-3 CMOS checker
暂无分享,去创建一个
[1] Dhiraj K. Pradhan,et al. A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications , 1980, IEEE Transactions on Computers.
[2] Niraj K. Jha,et al. Testing and Reliable Design of CMOS Circuits , 1989 .
[3] Arthur D. Friedman,et al. Efficient Design of Self-Checking Checker for any m-Out-of-n Code , 1978, IEEE Transactions on Computers.
[4] Constantin Halatsis,et al. A New Design Method for m-Out-of-n TSC Checkers , 1983, IEEE Transactions on Computers.
[5] Tracy Larrabee,et al. Testing for parametric faults in static CMOS circuits , 1990, Proceedings. International Test Conference 1990.
[6] Parag K. Lala,et al. Fault tolerant and fault testable hardware design , 1985 .
[7] Constantin Halatsis,et al. Efficient Modular Design of TSC Checkers for M-out-of-2M Codes , 1986, Aegean Workshop on Computing.
[8] Constantin Halatsis,et al. An Efficient TSC 1-out-of-3 Code Checker , 1990, IEEE Trans. Computers.
[9] Edward J. McCluskey,et al. "RESISTIVE SHORTS" WITHIN CMOS GATES , 1991, 1991, Proceedings. International Test Conference.
[10] Kanji Hirabayashi. Self-checking CMOS circuits using pass-transistor logic , 1991, J. Electron. Test..
[11] Constantin Halatsis,et al. Efficient Modular Design of TSC Checkers for M-out-of-2M Codes , 1988, IEEE Trans. Computers.
[12] John Paul Shen,et al. Inductive Fault Analysis of MOS Integrated Circuits , 1985, IEEE Design & Test of Computers.