FPGA based generic RO TRNG architecture for image confusion

True Random Number Generator (TRNG) has become a central element of today’s secure communication. TRNGs developed through FPGA implementation have a significant role in a number of applications in multimedia communication. Ring Oscillator (RO) has been adopted extensively for developing device-independent TRNG structures. The proposed design is a generic TRNG architecture based on an arrangement of ROs with post-processing. This TRNG was initially tested on Altera Cyclone II FPGA which consumed only 64 inverters to produce good randomness. Also, the device-independent capability of this design has been verified by implementing it on other two FPGA families Xilinx Artix – 7 and Microsemi Smart Fusion2. True randomness was also verified by conducting restart experiment, and the statistical properties of TRNG were evaluated through entropy analysis and NIST SP 800–22 tests. The proposed TRNG yields 26.640650 Mbps as throughput with a sampling clock of 27 MHz. Going beyond the regular key generation utility, the evolving random bits of TRNG were packed suitably to perform confusion of grayscale images producing a near-zero correlation of pixels, thereby extending the application of TRNG to image encryption.

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