A novel low on-resistance Schottky-barrier diode with p-buried floating layer structure

A novel low on-resistance Schottky-barrier diode (SBD) structure with a p-buried floating layer is demonstrated by fabricating 300-V SBDs using a buried epitaxial growth technique. The fabricated SBDs realize a 50% reduction of chip area and show a possibility of higher breakdown voltage SBD of over 100 V. In addition, both the low on-resistance and the soft-recovery characteristics can be realized by the p-buried floating layer structure. The demonstrated structure is very attractive for reduction of power dissipation without electromagnetic interference noise increase.

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