A UML-based Environment for System Design Space Exploration

The increasing complexity of System-on-Chip (SoC) and time-to-market constraints raise new methodological issues. To address these issues, this paper introduces a UML-based SoC modeling approach mixing simulation and formal verification techniques. A UML profile called DIPLODOCUS has been specified. Transformation rules were defined for generating from UML models either a SystemC model or a formal specification given in LOTOS. Thus, relying on SystemC or LOTOS tools the profile allows fast simulation or formal verification techniques to be used over the UML modeling. A toolkit supporting this profile has been implemented. The overall approach is experimented for the design of a telecommunication system.

[1]  Iso. Lotos,et al.  A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour , 1985 .

[2]  Ed F. Deprettere,et al.  A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems , 2001, J. VLSI Signal Process..

[3]  Patrick Schaumont,et al.  Hardware/software partitioning of embedded system in OCAPI-xl , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[4]  Luciano Lavagno,et al.  High-level architectural co-simulation using Esterel and C , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[5]  Andy D. Pimentel,et al.  An IDF-based trace transformation method for communication refinement , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[6]  Andy D. Pimentel,et al.  A software framework for efficient system-level performance evaluation of embedded systems , 2003, SAC '03.

[7]  Itay Peled,et al.  SOC modeling methodology for architectural exploration and software development , 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

[8]  Ludovic Apvrille,et al.  TURTLE: a real-time UML profile supported by a formal validation toolkit , 2004, IEEE Transactions on Software Engineering.

[9]  Wolfgang Müller,et al.  A model-based approach for executable specifications on reconfigurable hardware , 2005, Design, Automation and Test in Europe.

[10]  Timo Hämäläinen,et al.  Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems , 2005, 2005 International Symposium on System-on-Chip.

[11]  Yvon Savaria,et al.  The role of model-level transactors and UML in functional prototyping of systems-on-chip: a software-radio application , 2005, Design, Automation and Test in Europe.