Unified Retiming Operations on Multidimensional Multi-Rate Digital Signal Processing Systems

The intense requirements of high-speed implementations of MultiDimensional (MD) Digital Signal Processing (DSP) systems justify the Application Specific Integrated Circuits (ASIC) designs and/or multiprocessor implementations. MD retiming has been recently proposed to improve the circuitry performance in high-level synthesis of single-rate MD DSP systems. This paper has conducted new theoretical analysis of MD multirate DSP systems modeled in data-flow graphs, and proposes intercalation of MD multirate systems so that unified MD retiming operations can be applied on multidimensional multirate DSP systems. By retiming and intercalation, full intra-iteration parallelism is achieved and functional elements can be executed simultaneously on circuits for the generic class of MD multirate DSP systems.

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