Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops
暂无分享,去创建一个
Haruhiko Ichino | Y. Kobayashi | Chikara Yamaguchi | M. Togashi | K. Ishii | Y. Kobayashi | H. Ichino | M. Togashi | C. Yamaguchi | K. Ishii
[1] M. Hafizi,et al. 39.5-GHz static frequency divider implemented in AlInAs/GaInAs HBT technology , 1992, IEEE Electron Device Letters.
[2] Haruhiko Ichino,et al. Circuit design for a 15-Gb/s Si bipolar decision circuit , 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.
[3] W. Fang. Accurate analytical delay expressions for ECL and CML circuits and their applications to optimizing high-speed bipolar circuits , 1990 .
[4] M. Suzuki,et al. 20 Gbit/s GaAs MESFET multiplexer IC using a novel T-type flip-flop circuit , 1992 .
[5] B. Peetz,et al. An 8-bit 250 megasample per second analog-to-digital converter: operation without a sample and hold , 1986 .
[6] Hans-Martin Rein,et al. 3.8 Gbit/s bipolar master/slave D-flip-flop IC as a basic element for high-speed optical communication systems , 1986 .
[7] J. Hauenschild,et al. Static frequency dividers for high operating speed (25 GHz, 170 mW) and low power consumption (16 GHz, 8 mW) in selective epitaxial Si bipolar technology , 1993 .
[8] Haruhiko Ichino,et al. Maximum operating frequency in Si bipolar master-slave toggle flip-flop circuit , 1994 .
[9] J. Hauenschild,et al. Suitability of present silicon bipolar IC technologies for optical fibre transmission rates around and above 10 Gbit/s , 1990 .
[10] H. Ichino,et al. 0.5-/spl mu/m bipolar technology using a new base formation method: SST1C , 1993, 1993 Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting.