Material layers with a thickness of a few nanometers are common-place in today's semiconduc- tor devices. Before long, device fabrication methods will reach a point at which the other two device dimensions are scaled down to few tens of nanometers. The total atom count in such deca-nano devices is reduced to a few million. Only a small finite number of "free" electrons will operate such nano-scale devices due to quantized electron energies and electron charge. This work demon- strates that the simulation of electronic structure and electron transport on these length scales must not only be fundamentally quantum mechanical, but it must also include the atomic granularity of the device. Various el- ements of the theoretical, numerical, and software foun- dation of the prototype development of a Nanoelectronic Modeling tool (NEMO 3-D) which enables this class of device simulation on Beowulf cluster computers are pre- sented. The electronic system is represented in a sparse complex Hamiltonian matrix of the order of hundreds of millions. A custom parallel matrix vector multiply al- gorithm that is coupled to a Lanczos and/or Rayleigh- Ritz eigenvalue solver has been developed. Benchmarks of the parallel electronic structure and the parallel strain calculation performed on various Beowulf cluster com- puters and a SGI Origin 2000 are presented. The Be- owulf cluster benchmarks show that the competition for memory access on dual CPU PC boards renders the util- ity of one of the CPUs useless, if the memory usage per node is about 1-2 GB. A new strain treatment for the
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