High Speed High Precision Voltage-Mode MAX and MIN Circuits

This paper presents a new high speed voltage-mode max-min method for fuzzy application. In the proposed circuits, a differential pair is employed to choose the desired input. In addition to high speed, high precision and simple expansion for multiple inputs are the main advantages of this method. HSPICE simulation results show that the proposed circuit has maximum of 1% error at 100MHz.

[1]  Ganesh Kothapalli,et al.  Compensation of a winner take all circuit , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

[2]  R. Perfetti.  «Winner-take-all» circuit for neurocomputing applications , 1990 .

[3]  Ying-Wei Jan,et al.  A voltage based winner takes all circuit for analog neural networks , 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

[4]  H. Chaoui.  CMOS multiple input voltage winner takes all circuit , 1995 .

[5]  Barbaros Sekerkiran,et al.  A high resolution CMOS winner-take-all circuit , 1995, Proceedings of ICNN'95 - International Conference on Neural Networks.

[6]  Janusz A. Starzyk,et al.  CMOS current mode winner-take-all circuit with both excitatory and inhibitory feedback , 1993 .

[7]  Okyay Kaynak,et al.  Neuro-fuzzy architecture for CMOS implementation , 1999, IEEE Trans. Ind. Electron..

[8]  F. Ueno,et al.  New high-speed analogue MAX and MIN circuits using OTA-based bounded-difference operations , 1991 .

[9]  John Lazzaro,et al.  Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.