65nm LP/GP mix low cost platform for multi-media wireless and consumer applications

A complete 65nm CMOS platform, called LP/GP mix, has been developed employing thick oxide transistor (1.0), low power (LP) and general purpose (GP) devices on the same chip. Dedicated to wireless multi-media and consumer applications, this new triple gate oxide platform is low cost (+mask only) and saves over 35% of dynamic power with the use of the low operating voltage GP. The LP/GP mix shows competitive digital performance with a ring oscillator (FO=1) speed equal to 7ps per stage (GP) and 6T-SRAM static power lower than 1 Op A/cell (LP). Compatible with mixed-signal design requirements, transistors show high voltage gain, low mismatch factor and low flicker noise. Moreover, to address mobile phone demands, excellent RF performance has been achieved with F/sub T/=160GHz for LP nMOS transistors.

[1]  S. Borkar,et al.  Circuit techniques for subthreshold leakage avoidance, control and tolerance , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..