New efficient offset voltage cancellation techniques using digital trimming

Operational amplifiers have an important role as a basic building block in analog circuit design. One of the performance limitations of these circuits is the input referred offset voltage or simply input offset voltage. This voltage can range between 1 - 30 mV depending on the fabrication process and the sizes of the ideally symmetrical input transistors of the differential amplifier. Two new techniques to digitally trim the offset voltage of operation amplifier are presented and discussed. The techniques can be divided into two categories. The first is called weighted current technique, while the second is called weighted voltage technique. The attractive features of the new techniques are the trimming is performed digitally, large dynamic range; require small silicon area, and the ability to provide auto-zero cancellation using extra hardware. In the presented analysis, a binary weighted scheme will be used. However, the techniques are not restricted to that scheme and they are still applicable with other weighting schemes. A detailed analysis of these techniques will be presented and discussed and measurement from fabrication and simulation will be presented.

[1]  W. Guggenbuhl,et al.  An analog trimming circuit based on a floating-gate device , 1988 .

[2]  Gabor C. Temes,et al.  Random error effects in matched MOS capacitors and current sources , 1984 .

[3]  F. Forti,et al.  Measurement of MOS current mismatch in the weak inversion region , 1994, IEEE J. Solid State Circuits.

[4]  Y. Watanabe,et al.  Offset compensating bit-line sensing scheme for high density DRAM's , 1994 .

[5]  Yen-Bin Gu,et al.  Weak inversion charge injection in analog MOS switches , 1995 .

[6]  I. E. Opris,et al.  A rail-to-rail ping-pong op-amp , 1996, IEEE J. Solid State Circuits.

[7]  Mahesh B. Patil,et al.  Measurement and analysis of charge injection in MOS analog switches , 1987 .

[8]  Eric A. Vittoz The Design of High-Performance Analog Circuits on Digital CMOS Chips , 1985 .

[9]  R. Poujois,et al.  A low drift fully integrated MOSFET operational amplifier , 1978, IEEE Journal of Solid-State Circuits.

[10]  Y.P. Tsividis,et al.  A CMOS voltage reference , 1978, IEEE Journal of Solid-State Circuits.

[11]  Chong-Gun Yu,et al.  An automatic offset compensation scheme with ping-pong control for CMOS operational amplifiers , 1994 .

[12]  Terri S. Fiez,et al.  Analog VLSI : signal and information processing , 1994 .

[13]  Hae-Seung Lee,et al.  Digital cancellation of noise and offset for capacitive sensors , 1993 .

[14]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[15]  Sidney Soclof Analog integrated circuits , 1985 .