Digital Architectures for Adaptive Processing of Measurement Data

In this paper we describe the design of digital architectures suitable for the implementation of measurement data classification based on Support Vector Machines (SVMs). The performance of such architectures are then analyzed. The proposed approach can be applied for solving identification and inverse modelling problems, and for processing complex measurement data. Two very different case studies where real-time processing is of paramount importance are discussed: a nonlinear channel equalization and a high energy physics classification task.

[1]  Davide Anguita,et al.  A digital architecture for support vector machines: theory, algorithm, and FPGA implementation , 2003, IEEE Trans. Neural Networks.

[2]  Ray Andraka,et al.  A survey of CORDIC algorithms for FPGA based computers , 1998, FPGA '98.

[3]  Heekuck Oh,et al.  Neural Networks for Pattern Recognition , 1993, Adv. Comput..

[4]  Xiaobo Sharon Hu,et al.  Expanding the Range of Convergence of the CORDIC Algorithm , 1991, IEEE Trans. Computers.

[5]  Vladimir Vapnik,et al.  Statistical learning theory , 1998 .

[6]  Gert Cauwenberghs,et al.  Kerneltron: Support Vector 'Machine' in Silicon , 2002, SVM.

[7]  S. McBader,et al.  The impact of modern FPGA architectures on neural hardware: a case study of the TOTEM neural processor , 2004, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541).

[8]  Bernhard Schölkopf,et al.  Learning with kernels , 2001 .

[9]  D. Petri,et al.  Inverse modeling with SVMs-based dynamically reconfigurable systems , 2004, Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.04CH37510).

[10]  Sandro Ridella,et al.  Model selection in top quark tagging with a support vector classifier , 2004, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541).