Efficient Storage Schemes for Arbitrary Size Square Matrices in Parallel Processors with Shuffle-Exchange Networks

[1]  Cauligi S. Raghavendra,et al.  Optimal Self-Routing of Linear-Complement Permutations in Hypercubes , 1990, Proceedings of the Fifth Distributed Memory Computing Conference, 1990..

[2]  Cauligi S. Raghavendra,et al.  A Comparative Study of a Class of Double Loop Network Architectures , 1984, ICC.

[3]  Cauligi S. Raghavendra,et al.  A Survey of Multi-Connected Loop Topologies for Local Computer Networks , 1986, Comput. Networks.

[4]  Cauligi S. Raghavendra,et al.  Fault-tolerant routing in a class of double loop networks , 1988, IEEE INFOCOM '88,Seventh Annual Joint Conference of the IEEE Computer and Communcations Societies. Networks: Evolution or Revolution?.

[5]  Cauligi S. Raghavendra,et al.  A Dynamic Load-Balancing Policy With a Central Job Dispatcher (LBC) , 1992, IEEE Trans. Software Eng..

[6]  Cauligi S. Raghavendra,et al.  Algorithms and Bounds for Shortest Paths and Diameter in Faulty Hypercubes , 1993, IEEE Trans. Parallel Distributed Syst..

[7]  Cauligi S. Raghavendra,et al.  Minimal Full-Access Networks: Enumeration and Characterization , 1990, J. Parallel Distributed Comput..

[8]  Cauligi S. Raghavendra,et al.  Exact solutions to diameter and routing problems in PEC networks , 1993, Proceedings of 1993 5th IEEE Symposium on Parallel and Distributed Processing.

[9]  Cauligi S. Raghavendra,et al.  A state-aggregation method for analyzing dynamic load-balancing policies , 1993, [1993] Proceedings. The 13th International Conference on Distributed Computing Systems.

[10]  Salim Hariri,et al.  SYREL: A Symbolic Reliability Algorithm Based on Path and Cutset Methods , 1987, IEEE Transactions on Computers.

[11]  Cauligi S. Raghavendra,et al.  Optical Interconnection Networks , 1985, ICPP.

[12]  Milos D. Ercegovac,et al.  A simulator for on-line arithmetic , 1981, 1981 IEEE 5th Symposium on Computer Arithmetic (ARITH).

[13]  Cauligi S. Raghavendra,et al.  On Array Storage for Conflict-Free Memory Access for Parallel Processors , 1988, International Conference on Parallel Processing.

[14]  Cauligi S. Raghavendra,et al.  A parallel algorithm for execution of production systems on HMESH architecture , 1987, FJCC.

[15]  Cauligi S. Raghavendra,et al.  Flexible, fault-tolerant routing criteria for circuit-switched hypercubes , 1991, [1991] Proceedings. 11th International Conference on Distributed Computing Systems.

[16]  Cauligi S. Raghavendra,et al.  Embedding of Multidimensional Meshes on to Faulty Hypercubes , 1991, ICPP.

[17]  Cauligi S. Raghavendra,et al.  Rearrangeability of the Five-Stage Shuffle/Exchange Network for N = 8 , 1987, IEEE Trans. Commun..

[18]  Cauligi S. Raghavendra,et al.  Fault-Tolerant Routing in Multistage Interconnection Networks , 1989, IEEE Trans. Computers.

[19]  Cauligi S. Raghavendra,et al.  Reliability Analysis of an Interconnection Network , 1984, ICDCS.

[20]  Cauligi S. Raghavendra,et al.  Reliable Loop Topologies for Large Local Computer Networks , 1985, IEEE Transactions on Computers.

[21]  Cauligi S. Raghavendra,et al.  Reliability and fault-tolerance in multistage interconnection networks , 1987 .

[22]  Salim Hariri,et al.  Reliability measures and their approximate evaluations for networks and distributed systems , 1990, [Proceedings] GLOBECOM '90: IEEE Global Telecommunications Conference and Exhibition.

[23]  Milos D. Ercegovac,et al.  Fault Tolerance in Binary Tree Architectures , 1984, IEEE Transactions on Computers.

[24]  Cauligi S. Raghavendra,et al.  An Analysis of a Reliability Model for Repairable Fault-Tolerant Systems , 1993, IEEE Trans. Computers.

[25]  Cauligi S. Raghavendra,et al.  Fault-Tolerance and Data-Flow Systems , 1985, ICDCS.

[26]  Zoran Obradovic,et al.  Cooperative Genetic Algorithm for Optimization Problems in Distributed Computer Systems , 1993 .

[27]  Cauligi S. Raghavendra,et al.  On Reliability Modeling of Closed Fault-Tolerant Computer Systems , 1990, IEEE Trans. Computers.

[28]  Cauligi S. Raghavendra,et al.  On Self-Routing in Benes and Shuffle-Exchange Networks , 1991, IEEE Trans. Computers.

[29]  Cauligi S. Raghavendra,et al.  Gracefully Degradable Processor Arrays , 1985, IEEE Transactions on Computers.

[30]  Salim Hariri,et al.  Distributed Functions Allocation for Reliability and Delay Optimization , 1986, FJCC.

[31]  Salim Hariri,et al.  Reliability Optimization in the Design of Distributed Systems , 1985, IEEE Transactions on Software Engineering.

[32]  Cauligi S. Raghavendra,et al.  Optical Matrix-Vector Implementation of Crossbar Interconnection Networks , 1986, ICPP.

[33]  Cauligi S. Raghavendra,et al.  Minimum spanning tree on the HMESH architecture , 1988, Proceedings., 2nd Symposium on the Frontiers of Massively Parallel Computation.

[34]  Cauligi S. Raghavendra,et al.  A model for optimal database allocation in distributed computing systems , 1990, Proceedings. IEEE INFOCOM '90: Ninth Annual Joint Conference of the IEEE Computer and Communications Societies@m_The Multiple Facets of Integration.

[35]  Cauligi S. Raghavendra,et al.  Optimal Routing of Bit-Permutes on Hypercube Machines , 1990, ICPP.

[36]  Cauligi S. Raghavendra,et al.  Broadcasting algorithms in faulty SIMD hypercubes , 1992, [1992] Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing.

[37]  Cauligi S. Raghavendra,et al.  Double Loop Network Architectures - A Performance Study , 1985, IEEE Transactions on Communications.

[38]  Viktor K. Prasanna,et al.  Reliability Analysis in Distributed Systems , 1988, IEEE Trans. Computers.

[39]  Cauligi S. Raghavendra,et al.  Generalized Schemes for Access and Alignment of Data in Parallel Processors with Self-Routing Interconnection Networks , 1991, J. Parallel Distributed Comput..

[40]  Cauligi S. Raghavendra,et al.  The Gamma network: A multiprocessor interconnection network with redundant paths , 1982, ISCA.

[41]  C. S. Raghavendra,et al.  Reliability Modeling and Analysis of Computer Networks , 1986, IEEE Transactions on Reliability.

[42]  Cauligi S. Raghavendra,et al.  Resource Allocation in Hypercube Systems , 1990, Proceedings of the Fifth Distributed Memory Computing Conference, 1990..

[43]  Kichul Kim,et al.  A simple algorithm to route arbitrary permutations on 8-input 5-stage shuffle/exchange network , 1991, [1991] Proceedings. The Fifth International Parallel Processing Symposium.

[44]  Tong-Yee Lee,et al.  A fully distributed parallel ray tracing scheme on the Delta Touchstone machine , 1993, [1993] Proceedings The 2nd International Symposium on High Performance Distributed Computing.

[45]  Cauligi S. Raghavendra,et al.  An analysis of the join the shortest queue (JSQ) policy , 1992, [1992] Proceedings of the 12th International Conference on Distributed Computing Systems.

[46]  Cauligi S. Raghavendra,et al.  Uniform Minimal Full-Access Networks , 1988, J. Parallel Distributed Comput..

[47]  Cauligi S. Raghavendra,et al.  On Dynamic Full Access in Multistage Interconnection Networks , 1989, Reliability Of Computer And Communication Networks.

[48]  Cauligi S. Raghavendra,et al.  Analysis and Simulation of a Class of double Loop Network Architectures , 1984, IEEE Conference on Computer Communications.

[49]  Cauligi S. Raghavendra,et al.  Improved algorithms for load balancing in circuit-switched hypercubes , 1991, [1991] Proceedings. The Fifth International Parallel Processing Symposium.

[50]  Cauligi S. Raghavendra,et al.  A model for optimal resource allocation in distributed computing systems , 1988, IEEE INFOCOM '88,Seventh Annual Joint Conference of the IEEE Computer and Communcations Societies. Networks: Evolution or Revolution?.

[51]  Cauligi S. Raghavendra,et al.  Realization of permutations on generalized INDRA networks , 1988, Inf. Sci..

[52]  Cauligi S. Raghavendra,et al.  Prefix Computation on a Faulty Hypercube , 1993, 1993 International Conference on Parallel Processing - ICPP'93.

[53]  Cauligi S. Raghavendra,et al.  Queueing analysis in dynamic distributed real-time systems , 1989, [1989] Proceedings. EUROMICRO Workshop on Real Time.

[54]  Cauligi S. Raghavendra,et al.  Optimal loop topologies for distributed systems , 1981, SIGCOMM 1981.

[55]  Cauligi S. Raghavendra,et al.  Fault-Tolerant Networks Based on the de Bruijn Graph , 1991, IEEE Trans. Computers.

[56]  Cauligi S. Raghavendra,et al.  Fault-tolerant routing in MIN-based supercomputers , 1990, Supercomputing '90.

[57]  Cauligi S. Raghavendra,et al.  Dynamic Relibility Modeling and Analysis of Computer Networks , 1983, International Conference on Parallel Processing.

[58]  Cauligi S. Raghavendra,et al.  HMESH: A VLSI Architecture for Parallel Processing , 1986, CONPAR.

[59]  Cauligi S. Raghavendra.  Fault Tolerance in Regular Network Architectures , 1984, IEEE Micro.

[60]  Cauligi S. Raghavendra,et al.  Optimal joint load balancing and routing in message switched computer networks , 1988, IEEE INFOCOM '88,Seventh Annual Joint Conference of the IEEE Computer and Communcations Societies. Networks: Evolution or Revolution?.

[61]  Cauligi S. Raghavendra,et al.  Optical Crossbar Networks , 1987, Computer.

[62]  Cauligi S. Raghavendra,et al.  Reconfiguration of binary trees in faulty hypercubes , 1993, [1993] Proceedings Seventh International Parallel Processing Symposium.

[63]  Cauligi S. Raghavendra,et al.  The POTATO chip architecture: a study in tradeoffs for signal processing chip design , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[64]  Cauligi S. Raghavendra,et al.  Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Networks , 1986, IEEE Transactions on Computers.

[65]  C. Raghavendra,et al.  Reliability evaluation of fault-tolerant computers for aerospace applications , 1989 .

[66]  Cauligi S. Raghavendra,et al.  Reliability analysis of redundant-path interconnection networks , 1989 .

[67]  Cauligi S. Raghavendra,et al.  TERMINAL RELIABILITY OPTIMIZATION IN DISTRIBUTED PROCESSING SYSTEMS. , 1984 .

[68]  Viktor K. Prasanna,et al.  Array Processor with Multiple Broadcasting , 1985, ISCA.

[69]  Cauligi S. Raghavendra,et al.  Reconfiguring embedded task graphs in faulty hypercubes by automorphisms , 1990, Twenty-Third Annual Hawaii International Conference on System Sciences.

[70]  Cauligi S. Raghavendra,et al.  On Methods for Fast and Efficient Parallel Memory Access , 1990, ICPP.

[71]  Cauligi S. Raghavendra,et al.  Performance Analysis of a Redundant-Path Interconnection Network , 1985, International Conference on Parallel Processing.

[72]  Melvin A. Breuer,et al.  Fault tolerance in linear systolic arrays using time redundancy , 1990, [1988] Proceedings of the Twenty-First Annual Hawaii International Conference on System Sciences. Volume I: Architecture Track.

[73]  Cauligi S. Raghavendra,et al.  On finding maximal subcubes in residual hypercubes , 1990, Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing 1990.

[74]  Viktor K. Prasanna,et al.  Distributed program reliability analysis , 1986, IEEE Transactions on Software Engineering.

[75]  Cauligi S. Raghavendra,et al.  Fault tolerance and testing aspects of an architecture for a generalized sidelobe cancellor , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[76]  Salim Hariri,et al.  RELIABILITY MEASURES FOR DISTRIBUTED PROCESSING SYSTEMS. , 1985 .

[77]  Cauligi S. Raghavendra,et al.  Global semigroup operations in faulty SIMD hypercubes , 1993, [1993] Proceedings Seventh International Parallel Processing Symposium.

[78]  Cauligi S. Raghavendra,et al.  On Permutations Passable by the Gamma Network , 1986, J. Parallel Distributed Comput..

[79]  Cauligi S. Raghavendra,et al.  Resource allocation with load balancing consideration in distributed computing systems , 1989, IEEE INFOCOM '89, Proceedings of the Eighth Annual Joint Conference of the IEEE Computer and Communications Societies.

[80]  Cauligi S. Raghavendra,et al.  Rearrangeability of multistage shuffle/exchange networks , 1988, IEEE Trans. Commun..

[81]  Cauligi S. Raghavendra,et al.  Applications for arithmetic error codes in large, high-performance computers , 1983, 1983 IEEE 6th Symposium on Computer Arithmetic (ARITH).

[82]  S. Chalasani,et al.  A comparison of adaptive packet-routing algorithms for tori , 1993, Proceedings of Phoenix Conference on Computers and Communications.

[83]  Cauligi S. Raghavendra,et al.  The Gamma Network , 1984, IEEE Transactions on Computers.

[84]  Cauligi S. Raghavendra,et al.  Performance study of dynamic load balancing policies for distributed systems with service interruptions , 1991, IEEE INFCOM '91. The conference on Computer Communications. Tenth Annual Joint Comference of the IEEE Computer and Communications Societies Proceedings.

[85]  Viktor K. Prasanna,et al.  Permutations on Illiac IV-Type Networks , 1986, IEEE Transactions on Computers.