Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole
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T. Schram | N. Horiguchi | A. Thean | N. Collaert | N. Waldron | D. Linten | L. Ragnarsson | B. Kaczer | M. Heyns | G. Groeseneken | H. Arimura | J. Franco | S. Sioncke | G. Hellings | A. Vais | V. Putcha | B. Shie | X. Shi | Reyhaneh Mahlouji | L. Nyns | D. Zhou | J. Maes | Q. Xie | M. Givens | F. Tang | X. Jiang | A. Sibaja Hernandez