Cipher Block Based Authentication Module: a Hardware Design Perspective

Message Authentication Codes (MACs) are widely used in order to authenticate data packets, which are transmitted thought networks. Typically MACs are implemented using modules like hash functions and in conjunction with encryption algorithms (like Block Ciphers), which are used to encrypt the transmitted data. However NIST in May 2005 issued a standard, addressing certain applications and their needs, defining a way to implement MACs through FIPS-approved and secure block cipher algorithms. In this paper the best performing implementation of the CMAC standard is presented, in terms of throughput, along with an efficient AES design and implementation. © 2011 World Scientific Publishing Company.

[1]  Morris J. Dworkin,et al.  SP 800-38B. Recommendation for Block Cipher Modes of Operation: the CMAC Mode for Authentication , 2005 .

[2]  Dong Kyue Kim,et al.  Efficient Implementation of Pseudorandom Functions for Electronic Seal Protection Protocols , 2006, WISA.

[3]  Morris J. Dworkin,et al.  SP 800-38D. Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC , 2007 .

[4]  Frederic P. Miller,et al.  Advanced Encryption Standard , 2009 .

[5]  Tim Güneysu,et al.  DSPs, BRAMs, and a Pinch of Logic: Extended Recipes for AES on FPGAs , 2010, TRETS.

[6]  Matti Tommiska,et al.  A fully pipelined memoryless 17.8 Gbps AES-128 encryptor , 2003, FPGA '03.

[7]  Zbigniew Kotulski,et al.  CMAC, CCM and GCM/GMAC: Advanced modes of operation of symmetric block ciphers in wireless sensor networks , 2010, Inf. Process. Lett..

[8]  Ingrid Verbauwhede,et al.  A 21.54 Gbits/s fully pipelined AES processor on FPGA , 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[9]  Bruce Schneier,et al.  Applied cryptography : protocols, algorithms, and source codein C , 1996 .

[10]  Christof Paar,et al.  An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[11]  Saar Drimer.  Authentication of FPGA Bitstreams: Why and How , 2007, ARC.

[12]  Viktor K. Prasanna,et al.  An adaptive cryptographic engine for internet protocol security architectures , 2004, TODE.

[13]  José D. P. Rolim,et al.  An adaptive cryptographic engine for IPSec architectures , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

[14]  Antonino Mazzeo,et al.  An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm , 2003, FPL.