Study of substrate noise and techniques for minimization

The effects of substrate noise on analog circuits in a mixed-signal chip are described and analyzed based on measured results. Experimental data from a 0.25-/spl mu/m CMOS test chip reveals that substrate noise generated by digital circuits couples into analog circuits through circuit asymmetries and device nonlinearity, degrading analog circuit performance. In particular, a delta-sigma modulator shows over 20-dB reduction of signal-to-noise-plus-distortion ratio (SNDR) in the presence of large toggling digital inverters. To combat the effects of substrate noise, the technique of active substrate noise shaping is investigated. An implementation of active substrate noise shaping on the same test chip demonstrates over 10-dB improvement in SNDR in the 0-20-kHz band of the delta-sigma modulator in the presence of toggling digital inverters emulating I/O drivers. This technique complements existing substrate noise reduction techniques for integrated circuits without a significant penalty in power and does not require modification of analog nor digital circuits.

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