A fully integrated 24-dBm CMOS power amplifier for 802.11a WLAN applications

A fully integrated 24-dBm complementary metal oxide semiconductor (CMOS) power amplifier (PA) for 5-GHz WLAN applications is implemented using 0.18-/spl mu/m CMOS foundry process. It consists of differential three-stage amplifiers and fully integrated input/output matching circuits. The amplifier shows a P/sub 1/ of 21.8 dBm, power added efficiency of 13%, and gain of 21 dB, respectively. The saturated output power is above 24.1 dBm. This shows the highest output power among the reported 5-GHz CMOS PAs as well as completely satisfying IEEE 802.11a transmitter back off requirement.

[1]  M. Zargari,et al.  A 5 GHz CMOS transceiver for IEEE 802.11a wireless LAN , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[2]  B. McFarland,et al.  A 2.4 & 5 GHz dual band 802.11 WLAN supporting data rates to 108 Mb/s , 2002, 24th Annual Technical Digest Gallium Arsenide Integrated Circuit (GaAs IC) Symposiu.

[3]  A. Behzad,et al.  Direct-conversion CMOS transceiver with automatic frequency control for 802.11a wireless LANs , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..