Impact of DFE Error Propagation on FEC-Based High-Speed I/O Links

Modern state-of-the-art I/O links today rely exclusively upon a high SNR channel and an equalization-based inner transceiver to achieve a BER of 10-15. The equalizer typically consists of a transmit pre-emphasis driver for pre-cursor equalization and a receive DFE for post-cursor cancellation. Recently, forward error-correction (FEC) coding has been proposed to improve the BER and reduce power in high-speed I/O links. However, error-propagation in the DFE is a significant issue affecting code performance. The link performance is also tied to FEC implementation parameters like degree of parallelism. This paper presents a framework for analyzing the impact of DFE burst errors and implementation parameters on end-to-end link performance. For 10.3125Gb/s transmission through a channel with 19dB loss at Nyquist rate and serial FEC implementation, we find that a code rate r = 0.8 gives the best ISI penalty vs coding gain trade-off, and a codeword length of 750 bits is necessary to meet target performance. Further, it is observed that the performance of burst error correction codes does not necessarily improve with codeword length, i.e., there is an BER-optimal block length at a given code rate.

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