Petri Nets applied to the modelling and analysis of computer architecture problems

Abstract In this invited work we consider Petri Nets and some interpretations to describe systems in the computer architecture domain. Petri Nets allow to model complex relations of synchronization and concurrency in a simple way. A Petri net model can be used to understand a given design by simulation as well as to analyze functional and performance properties without changing the representation of the modelled system. A very simple example is used to illustrate the approach together with brief references to a few works from the literature where other architectural problems have been considered from a Petri Net perspective.

[1]  Manuel Silva Suárez,et al.  On the analysis and synthesis of free choice systems , 1991, Applications and Theory of Petri Nets.

[2]  Manuel Silva Suárez,et al.  On the Computation of Structural Synchronic Invariants in P/T Nets , 1988, European Workshop on Applications and Theory of Petri Nets.

[3]  Manuel Silva Suárez,et al.  Structural techniques and performance bounds of stochastic Petri net models , 1992, Advances in Petri Nets: The DEMON Project.

[4]  Manuel Silva,et al.  Properties and performance bounds for closed free choice synchronized monoclass queueing networks , 1991 .

[5]  Rami R. Razouk.  The use of Petri nets for modeling pipelined processors , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[6]  G. Stewart,et al.  Sparse Matrix Proceedings. , 1980 .

[7]  Manuel Silva Suárez,et al.  Approximate Throughput Computation of Stohastic Marked Graphs , 1992, J. Parallel Distributed Comput..

[8]  Manuel Silva,et al.  Introducing Petri nets , 1993 .

[9]  Giuliana Franceschinis,et al.  Understanding Parallel Program Behavior through Petri Net Models , 1992, J. Parallel Distributed Comput..

[10]  Gianni Conte,et al.  Topology and Process Interaction in Concurrent Architectures: A GSPN Modeling Approach , 1992, J. Parallel Distributed Comput..

[11]  Jenq-Neng Hwang,et al.  Wavefront Array Processors-Concept to Implementation , 1987, Computer.

[12]  Giovanni Chiola,et al.  Properties and Performance Bounds for Timed Marked Graphs , 1992 .

[13]  F. Neri,et al.  On the construction of abstract GSPNs: an exercise in modeling , 1991, Proceedings of the Fourth International Workshop on Petri Nets and Performance Models PNPM91.

[14]  Tadao Murata,et al.  Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.

[15]  H. T. Kung,et al.  Systolic Arrays for (VLSI). , 1978 .

[16]  Eike Best,et al.  Structure Theory of Petri Nets: the Free Choice Hiatus , 1986, Advances in Petri Nets.

[17]  Claire Hanen.  Optimizing microprograms for recurrent loops on pipelined architectures using timed Petri nets , 1988, European Workshop on Applications and Theory in Petri Nets.

[18]  S. C. Bruell,et al.  An Example of Modeling and Evaluation of a Concurrent Program Using Colored Stochastic Petri Nets: Lamport's Fast Mutual Exclusion Algorithm , 1992, IEEE Trans. Parallel Distributed Syst..

[19]  Manuel Silva Suárez,et al.  Embedded Product-Form Queueing Networks and the Improvement of Performance Bounds for Petri Net Systems , 1993, Perform. Evaluation.

[20]  Zhen Liu,et al.  Equivalence, reversibility and symmetry properties in fork/join queueing networks with blocking , 1990 .

[21]  Marco Ajmone Marsan,et al.  Performance models of multiprocessor systems , 1987, MIT Press series in computer systems.

[22]  H. T. Kung.  Why systolic architectures? , 1982, Computer.

[23]  Kurt Jensen.  High-Level Petri Nets , 1982, European Workshop on Applications and Theory of Petri Nets.