The Design of FIR Band-Pass Filter with Improved Distributed Algorithm Based on FPGA

Finite impulse response(FIR) Band-pass filter is widely used in many digital signal processing. Its advantage is good linear phase character for designing any amplitude frequency characteristic, which is very critical to real-time digital signal processing. In this paper, we analyzed the filter's structure and traditional algorithms, and pointed out the weakness, and then proposed an optimal distributed algorithm which is applied in our FIR filter. We also combined ALTERA FPGA which is featured by four input lookup tables logic structure with VHDL to design the FIR filter featured real-time, high-speed, and stability. We designed every module by VHDL including delaying module, storage module, accumulator module, controller, and selector in FIR filter. Finally, we used different simulation software to show the performance of FIR filter by setting different parameter. We not only simulated the performance of FIR filter in Matlab, but also presented every module timing diagram in Max+PlusⅡ

[1]  Keshab K. Parhi,et al.  VLSI digital signal processing systems , 1999 .

[2]  Shu-Ming Chang,et al.  FPGA implementation of FIR filter using M-bit parallel distributed arithmetic , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[3]  Mathias C. Lang,et al.  Least-squares design of IIR filters with prescribed magnitude and phase responses and a pole radius constraint , 2000, IEEE Trans. Signal Process..

[4]  G. Venkatesh,et al.  Area-delay tradeoff in distributed arithmetic based implementation of FIR filters , 1997, Proceedings Tenth International Conference on VLSI Design.

[5]  David V. Anderson,et al.  Hardware-efficient distributed arithmetic architecture for high-order digital filters , 2005, Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005..

[6]  Venkatesh Krishnan,et al.  LMS adaptive filters using distributed arithmetic for high throughput , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[7]  Zhu Hao Design of 16 order FIR filter based on FPGA , 2005 .