Design of 370-ps Delay Floating-Voltage Level Shifters With 30-V/ns Power Supply Slew Tolerance

A new design method for producing high-performance and power-rail slew-tolerant floating-voltage level shifters is presented, offering increased speed, reduced power consumption, and smaller layout area compared with previous designs. The method uses an energy-saving pulse-triggered input, a high-bandwidth current mirror, and a simple full latch composed of two inverters. A number of optimizations are explored in detail, resulting in a presented design with a dVdd slew immunity of 30 V/ns, and near-zero static power dissipation in a 180-nm technology. Experimental results show a delay of below 370 ps for a level-shift range of 8-20 V. Postlayout simulation puts the energy consumption at 2.6 pJ/bit at 4 V and 7.2 pJ/bit at 20 V, with near symmetric rise and fall delays.

[1]  Marcelino B. Santos,et al.  Level Shifters and DCVSL for a Low-Voltage CMOS 4.2-V Buck Converter , 2008, IEEE Transactions on Industrial Electronics.

[2]  Torsten Lehmann,et al.  Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 $\mu$m HV-CMOS Technology , 2011, IEEE Journal of Solid-State Circuits.

[3]  G. Baccarani,et al.  IIA-1 generalized scaling theory and its application to a 1/4 micron mosfet design , 1982, IEEE Transactions on Electron Devices.

[4]  Hoi Lee,et al.  A synchronous LED driver with dynamic level-shifting and simultaneous peak & valley current sensing for high-brightness lighting applications , 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

[5]  Torsten Lehmann.  Design of fast low-power floating high-voltage level-shifters , 2014 .

[6]  Byong-Deok Choi.  Enhancement of current driving capability in data driver ICs for plasma display panels , 2009, IEEE Transactions on Consumer Electronics.

[7]  G. Baccarani,et al.  Generalized scaling theory and its application to a ¼ micrometer MOSFET design , 1984, IEEE Transactions on Electron Devices.

[8]  Leon M. Tolbert,et al.  Silicon-on-insulator-based high-voltage, high-temperature integrated circuit gate driver for silicon carbide-based power field effect transistors , 2010 .

[9]  Qiang Ye,et al.  A high speed and power-efficient level shifter for high voltage buck converter drivers , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

[10]  Bram Nauta,et al.  Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage , 2014, IEEE Journal of Solid-State Circuits.

[11]  Duncan G. Elliott,et al.  Low-power static and dynamic high-voltage CMOS level-shifter circuits , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[12]  Sung-Chul Lee,et al.  A Novel Level-Shifter Circuit Design For Display Panel Driver , 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.