Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework
暂无分享,去创建一个
[1] Wayne Luk,et al. Run-Time Management of Dynamically Recongigurable Designs , 1998, FPL.
[2] David Robinson,et al. New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic , 1998, FPL.
[3] Gordon J. Brebner,et al. A Virtual Hardware Operating System for the Xilinx XC6200 , 1996, FPL.
[4] Oliver Diessel,et al. Run-time compaction of FPGA designs , 1997, FPL.
[5] Brad L. Hutchings,et al. Improving functional density through run-time constant propagation , 1997, FPGA '97.
[6] Patrick Lysaght,et al. Configuration controller synthesis for dynamically reconfigurable systems , 1996 .
[7] Patrick Lysaght. Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic , 1997, FPL.
[8] Patrick Lysaght,et al. A simulation tool for dynamically reconfigurable field programmable gate arrays , 1996, IEEE Trans. Very Large Scale Integr. Syst..