Turn-on transient analysis of a BiPMOS device

A BiPMOS device based on a 2- mu m BiCMOS technology with a buried layer and a 0.8- mu m 1*10/sup 16/ cm/sup -3/ epilayer is investigated. Conventional one-dimensional models of BiPMOS devices are shown to overestimate the transient turn-on performance. The transient behavior of a two-dimensional BiPMOS device has been analyzed by PISCES-2B. The analysis shows that the buildup and collapse of carrier distributions induce an internal voltage overshoot and trigger substantial substrate current.<<ETX>>

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