论文信息 - A compact model of VeSFET capacitances

A compact model of VeSFET capacitances

This paper introduces a compact model of the gate-to-source/drain capacitance of the VeSFET (Vertical-Slit Field-Effect Transistor). The model modifies an existing substrate-potential model to calculate the charge in the VeSFET's complex structure. It is valid for arbitrary biases on the device's two independent gates. Good agreement with numerical simulations is demonstrated.

Dominik Kasprowicz

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