Noise-Coupled ΔΣAD Modulator with Shared OP-Amp

This paper proposes an improved architecture of the noise-coupled ΔΣAD modulator with OP-Amp sharing technique. The noise-coupled ΔΣAD modulator enhances the order of noise-shaping efficiently by adding some passive capacitors and switches. However, in a conventional noise-coupled ΔΣAD modulator with feedforward path, an analog adder is needed before the quantizer, and especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals and coupled quantization noise, which leads to extra chip area and power dissipation. In this paper, we propose a novel architecture of the noise-coupled ΔΣAD modulator with OP-Amp sharing technique, which realizes the summation of feedforward signals and coupled quantization noise without an additional amplifier. The proposed architecture is functionally equivalent to the conventional noise-coupled modulator with smaller chip area and low power dissipation. We have performed simulation with MATLAB and SPICE to verify the effectiveness of the proposed architecture and modulator circuits. The simulation results show that the proposed modulator can realize the noise-shaping enhancement effectually as the same as the conventional noise-coupled modulator with small overhead.

[1]  Hiroshi Yoshida,et al.  Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator , 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[2]  Terri Fiez.  Linearity Enhancement of Multi-bit , 1995 .

[3]  Shouli Yan,et al.  A 14 mW 2.5 MS/s 14 bit $\Sigma\Delta$ Modulator Using Split-Path Pseudo-Differential Amplifiers , 2007, IEEE Journal of Solid-State Circuits.

[4]  Kyehyung Lee,et al.  Noise-coupled ADCs , 2006 .

[5]  P.J.A. Naus,et al.  A CMOS Stereo 16 Bit D/A Converter for Digital Audio , 1986, ESSCIRC '86: Twelfth European Solid-State Circuits Conference.

[6]  M. Steyaert,et al.  A 1-V, 1-MS/s, 88-dB sigma-delta modulator in 0.13-/spl mu/m digital CMOS technology , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

[7]  G. Temes,et al.  Wideband low-distortion delta-sigma ADC topology , 2001 .

[8]  Gabor C. Temes,et al.  A Noise-Coupled Time-Interleaved Delta-Sigma ADC with 4 . 2 MHz BW ,-98 dB THD , and 79 dB SNDR , 2008 .

[9]  Hao,et al.  Novel Architecture of Feedforward Second-Order Multibit ΔΣ AD Modulator , 2008 .

[10]  Andrea Baschirotto,et al.  Behavioral modeling of switched-capacitor sigma-delta modulators , 2003 .

[11]  Gabor C. Temes,et al.  Understanding Delta-Sigma Data Converters , 2004 .

[12]  Eduard F. Stikvoort.  Some remarks on the stability and performance of the noise shaper or sigma-delta modulator , 1988, IEEE Trans. Commun..

[13]  Qiuting Huang,et al.  A 25-MS/s 14-b 200-mW /spl Sigma//spl Delta/ Modulator in 0.18-/spl mu/m CMOS , 2004, IEEE Journal of Solid-State Circuits.

[14]  R. Baird,et al.  Linearity enhancement of multibit /spl Delta//spl Sigma/ A/D and D/A converters using data weighted averaging , 1995 .

[15]  Hiroshi Yoshida,et al.  ΔΣAD modulator for low power application , 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.