Design and linearity analysis of a M-2M DAC for very low supply voltage

This work presents the design of a 6 bits M-2M ladder Digital-to-Analog Converter (DAC) proper for operation under supply voltages of 200 mV or lower. Since the MOS transistors are operating in the subthreshold region under such low supply, the mismatch analysis was done using an all-region continuous MOSFET model. The performance of the circuit is evaluated through simulations and the trade-offs between linearity, supply voltage and sampling rate are investigated in the paper. It is proposed that a 6 bits M-2M DAC operating under 200 mV and with sampling rate of 5.1MS/s is feasible using a commercial 130 nm process and standard transistors.

[1]  Sergio Bampi,et al.  MOS-only M-2M DAC for ultra-low voltage applications , 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

[2]  Denis C. Daly,et al.  A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy , 2009, IEEE Journal of Solid-State Circuits.

[3]  Marcel J. M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[4]  Carlos Galup-Montoro,et al.  CMOS Analog Design Using All-Region MOSFET Modeling: Introduction to analog CMOS design , 2010 .

[5]  Carlos Galup-Montoro,et al.  An M-2M digital-to-analog converter design methodology based on a physical mismatch model , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[6]  Qiuting Huang,et al.  Design and implementation of an untrimmed MOSFET-only 10-bit A/D converter with -79-dB THD , 1998 .

[7]  Hamilton Klimach.  Modelo do descasamento (mismatch) entre transistores MOS , 2008 .

[8]  Carlos Galup-Montoro,et al.  Ultra-low voltage CMOS logic circuits , 2014, 2014 Argentine Conference on Micro-Nanoelectronics, Technology and Applications (EAMTA).

[9]  G. Geelen,et al.  An inherently linear and compact MOST-only current division technique , 1992 .

[10]  M. Komárek,et al.  Frequency Selection of Sine Wave for Dynamic ADC Test , 2010 .

[11]  C. Galup-Montoro,et al.  A compact model of MOSFET mismatch for circuit design , 2005, IEEE Journal of Solid-State Circuits.

[12]  Bengt E. Jonsson.  A survey of A/D-Converter performance evolution , 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.