On the design of a fourth-order continuous-time LC delta-sigma modulator for UHF A/D conversion

We consider the design and test of a fourth-order bandpass delta-sigma modulator (/spl Delta//spl Sigma/M) for conversion of UHF analog signals to the digital domain for heterodyning and processing there. A prototype modulator in 0.5-/spl mu/m SiGe presented in the second part of the paper achieved 40 dB of dynamic range in a 20-MHz bandwidth centered at 1 GHz and consumed 450 mW from a single 5-V supply. At the time this modulator was designed, no explicit design procedure to achieve a certain modulator performance level had been established. The first part of this paper, therefore, is devoted to explaining the tradeoffs involved in choosing the parameters for a gigahertz-clocking transconductor/LC-based /spl Delta//spl Sigma/M and formulating such an explicit design procedure. Finally, we elucidate some further design considerations, redesign the prototype to improve its simulated performance, and discuss the general appropriateness of high-speed continuous-time /spl Delta//spl Sigma/M for UHF analog-to-digital conversion.

[1]  P. Asbeck,et al.  Bandpass delta-sigma modulator with 800 MHz center frequency , 1997, GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997.

[2]  H. Tanimoto,et al.  A 2 GHz balanced harmonic mixer for direct-conversion receivers , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[3]  Weinan Gao,et al.  A 4 GHz fourth-order SiGe HBT band pass /spl Delta//spl Sigma/ modulator , 1998, 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215).

[4]  W. Martin Snelgrove,et al.  Continuous-time delta-sigma modulators for high-speed a/d conversion , 2013 .

[5]  E. J. V. D. Zwan.  A 2.3 mW CMOS /spl Sigma//spl Delta/ modulator for audio applications , 1997 .

[6]  M. A. Morin,et al.  A 1.6 Gb/s delta-sigma modulator with integrated wideband mixer for RF applications , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

[7]  Bernhard E. Boser,et al.  The Design of Sigma-Delta Modulation Analog-to-Digit a 1 Converters , 2004 .

[8]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[9]  W. Snelgrove,et al.  Design and implementation of a tunable 40 MHz-70 MHz Gm-C bandpass /spl Delta//spl Sigma/ modulator , 1997 .

[10]  T. Brooks,et al.  A 16b /spl Sigma//spl Delta/ pipeline ADC with 2.5 MHz output data-rate , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[11]  R. Schreier,et al.  Delta-sigma data converters : theory, design, and simulation , 1997 .

[12]  J.F. Jensen,et al.  A bandpass /spl Sigma//spl Delta/ modulator with 92 dB SNR and center frequency continuously programmable from 0 to 70 MHz , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[13]  Floyd M. Gardner,et al.  A Transformation for Digital Simulation of Analog Filters , 1986, IEEE Trans. Commun..

[14]  Weinan Gao,et al.  A 950MHz Second-order Integrated LC Bandpass /spl alpha/spl sigma/ Modulator , 1997, Symposium 1997 on VLSI Circuits.

[15]  R. H. Walden,et al.  A 3.2-GHz second-order delta-sigma modulator implemented in InP HBT technology , 1995, IEEE J. Solid State Circuits.

[16]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[17]  J. Cressler,et al.  Si/SiGe epitaxial-base transistors. I. Materials, physics, and circuits , 1995 .

[18]  Robert W. Adams,et al.  Design and Implementation of an Audio 18-Bit Analog-to-Digital Converter Using Oversampling Techniques , 1986 .

[19]  Barrie Gilbert,et al.  The multi-tanh principle: a tutorial overview , 1998, IEEE J. Solid State Circuits.

[20]  W. Snelgrove,et al.  Clock jitter and quantizer metastability in continuous-time delta-sigma modulators , 1999 .