Hardware Design of Modular Round Key Generator for AES Cipher Algorithm

Generating round key fast in AES algorithm supporting three key sizes, such as 128, 192, and 256-bit keys is a critical factor to develop high throughput AES processors. In this paper, we propose on-the-fly round key generator which can be applied to the pipelined and non-pipelined AES processor that both encryption and decryption modes must be implemented on a chip. The proposed round key generator has modular and area-and-time efficient structure which consists of two key expanders, such as key_exp_m and key_exp_s modules. The round key generator for non-pipelined AES processor with three key sizes and encryption/decryption modes has about 8-ns delay time under 0.25㎛ 2.5V CMOS standard cell library and consists of a bout 17,700 gates.