High density packaging in 2010 and beyond

As microsystems continue to move towards higher speed and microminiaturization, the demands for interconnection density both on the IC and the package increases tremendously. With the shift towards nano ICs by 2003 with 100 nm features, pitch of area array I/Os of the nano ICs will move towards 20-100 micron. Increasing system functionality and system-on-a-chip will place demands on the package to support extremely high digital clock speeds beyond 5 GHz, RF signals to 40 GHz, and optical data rates beyond 100 Gbps all on a single, highly integrated package or board. A completely new paradigm shift in high density packaging is required to meet these complex requirements. Current trends both in IC and systems packaging including SIP, wafer level packaging are steps in the right direction, but represent partial system solutions. The Packaging Research Center at Georgia Tech has been developing system-on-a-package (SOP) technology to integrate digital, RF, and optical, all on a multi-function, microminiaturized board. This paper reviews systems, IC, and high density packaging trends and summarizes the latest PRC developments in high density SOP packaging technology.

[1]  Suresh K. Sitaraman,et al.  Process modeling for sequential build-up of multi-layered structures , 1998, 1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206).

[2]  V. Sundaram,et al.  Design of inductors in organic substrates for 1-3 GHz wireless applications , 2002, 2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278).

[3]  Rao Tummala,et al.  Reliability assessment of microvias in HDI printed circuit boards , 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

[4]  Nan Marie Jokerst,et al.  Polymer waveguide optical interconnections for electrical interconnection substrates , 2002, CLEO 2002.

[5]  Stefan Edlund,et al.  A Universal Information Appliance , 1999, IBM Syst. J..

[6]  D. Balaraman,et al.  Novel hydrothermal processing (<100/spl deg/C) of ceramic-polymer composites for integral capacitor applications , 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).