Desenvolvimento de uma Rede Neural LVQ em Linguagem VHDL para Aplicações em Tempo-Real

The complexity of embbeded systems has been growing progressively, demanding implementations of real-time signal processing algorithms, usually not feasible with conventional processors. This paper describes the development of a LVQ neural network, to be implemented using a programmable logic device (FPGA). The use of a combinatorial distancecomparing block allows the execution of this task in a single clock cicle, reducing classification time of input sample. The source code, written in VHDL language, is based on a finite-state machine. It is presented a study about memory use and speed of the device as the network parameters are changed. As an example, a 128 dimension LVQ network was implemented, with two classes and 16 subclusters. The classification took 334 ms with a 25 MHz clock.