论文信息 - A 2 mW 89 dB DR continuous-time /spl Sigma//spl Delta/ ADC with increased immunity to wide-band interferers

A 2 mW 89 dB DR continuous-time /spl Sigma//spl Delta/ ADC with increased immunity to wide-band interferers

A continuous-time /spl Sigma//spl Delta/ ADC with merged channel filter and programmable-gain functionality is presented. Interferers above full-scale can be applied without jeopardizing reception of weak desired signals. The merged design occupies 0.14 mm/sup 2/ in 0.18 /spl mu/m CMOS, consumes 2 mW, and achieves 89 dB of dynamic range (DR) in a 1 MHz bandwidth.

[1] A 12 mW ADC delta-sigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

[2] Ian Galton,et al. A 12 mW ADC delta-sigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver , 2001 .