SEGR: a unique failure mode for power mosfets in spacecraft

Power MOSFETs are vulnerable to catastrophic single-event phenomena ena when exposed to the radiation environment of space. In particular, single-event-gate-rupture (SEGR) is a failure mechanism unique to DMOS power transistors caused by the passage of a heavy ion through the neck region of the device and the subsequent transient electric field across the gate oxide. This paper will describe the failure mode, present supporting experimental data, and demonstrate an effective simulation tool for predicting gate rupture.