论文信息 - A 57-to-64GHz two-path phased-array transmitter using linearity enhancement techniques in 28nm CMOS process

A 57-to-64GHz two-path phased-array transmitter using linearity enhancement techniques in 28nm CMOS process

A 60-GHz two-path phased-array transmitter (TX) with linearity enhancement techniques in 28nm CMOS technology is presented. The design is based on the all-RF architecture with buffer amplifiers (BA), 5-bit RF switched LC phase shifters, variable gain amplifiers (VGA), linearity enhanced power amplifiers (PA), bias circuit, serial peripheral interface (SPI). The two-way TX array achieves a 30dB gain adjustment range from −3 to 27dB with 2.5 dB step and 360° phase adjustment range with 11.25° resolution per path. Thanks to the adoption of proposed linearity enhancement technique, each path of the TX achieved output P1dB of 11.8dBm and 11.5dBm respectively. Each single path of the two-path TX array consumes 140mw from a 0.9-V supply voltage and occupies an area of 0.3 × 1. 4mm2.

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