This is an overview of a technical report by the same title. The authors consider the diagnosis of the dice on a semiconductor wafer, in which the processing element on each die contains logic that can test another die. The test circuitry is simplified when each die is the same, and this is an assumption of the model. Diagnosis with constant-degree digraphs is of practical interest to wafer-scale testing. In lieu of wafer probe the authors suggest the use of self-testing chips whose test arcs follow switchable interconnect laid along the scribe lines. Diagnosis of almost every good element is appropriate when it is acceptable for the manufacturer to throw away a small fraction of the good elements, but it is unacceptable for the manufacturer to package and sell a faulty chip. their results are new to the theory of system level diagnosis. Their approach offers an alternative to the testing of chips that have been probed or packaged. They suspect that this approach may be economically advantageous, and suggest that implementation of their proposed heuristic would be a worthwhile experiment.<<ETX>>
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