An embedded autonomous scan-based results analyzer (EARA) for SoC cores
暂无分享,去创建一个
[1] Christos A. Papachristou,et al. Microprocessor based testing for core-based system on chip , 1999, DAC '99.
[2] Yervant Zorian,et al. Testing embedded-core based system chips , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[3] André Ivanov,et al. Dedicated autonomous scan-based testing (DAST) for embedded cores , 2002, Proceedings. International Test Conference.
[4] Krishnendu Chakrabarty,et al. System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] Krishnendu Chakrabarty,et al. Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters , 2000, IEEE Trans. Very Large Scale Integr. Syst..
[6] A. Ivanov,et al. A packet switching communication-based test access mechanism for system chips , 2001, IEEE European Test Workshop, 2001..
[7] Vishwani D. Agrawal,et al. Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits [Book Review] , 2000, IEEE Circuits and Devices Magazine.