A fully integrated 6-bit vector-sum phase shifter in 0.18 um CMOS

This paper presents a fully integrated vector-sum phase shifter with a 6-bit digital control in 0.18 um CMOS technology. The proposed architecture of the phase shifter control circuit provides the RMS phase error below 1.5 degrees due to the novel amplifier gain control circuit. The measured maximum gain is -5 dB and input 1 dB compression point is up to 4 dBm. The RMS phase error is less than 4.5 degrees in 2.2-3.2 GHz band with the possibility to reduce below 1.5 degrees. The input and output return losses are better than -7 dB and -12 dB in the entire frequency range. The total power consumption is 94 mW. The core chip size is 6.04 sq. mm. To the best of the authors' knowledge, the designed circuit is the first S-band 6-bit vector-sum phase shifter with all digital 360 degrees phase-control range fully integrated in CMOS technology.

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