A 410-nW efficient QRS processor for mobile ECG monitoring in 0.18-μm CMOS

This paper proposes a low power and efficient QRS processor for real-time and continuous mobile ECG monitoring. The QRS detection algorithm is based on the harr wavelet transform. In order to reduce power consumption, an optimized FIR filter structure is proposed. To improve accuracy, R position modification (RPM) has been designed. Fabricated with the 0.18-μm N-well CMOS 1P6M technology, power consumption of this chip is only 410 nW in 1 V voltage supply, which is much lower than that of previous work. Validated by all 48 databases in the MIT-BIH arrhythmia database, sensitivity (Se) and positive prediction (Pr) are 99.60% and 99.77% respectively.

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